This invention relates to a sense amplifier for a CMOS DRAM (Dynamic Random Access Memory) and, more particularly, to the high performance sense amplifier that can read and write the data on a DRAM storage cell.
A power supply voltage Vcc for a logic level 1 or an earth level voltage Vss for a logic level 0 is stored on a typical DRAM memory cell. But when the DRAM has a higher density, the dimensions of a memory cell and storage capacitor for this are reduced sufficiently to become susceptible to a refresh time or soft error. The data stored in the memory cell may then be destroyed due to leakage current of the memory cell itself and refresh operation (time) suitable for the user may not be obtained.
Moreover, although soft error of the logic 1 voltage of the memory cell due to .alpha.-particles can been alleviated with a high-capacitance storage capacitor of trench structure, DRAM fabrication with an epitaxial layer, oxide layer or oxynitride layer to increase the capacitance of the storage capacitor presents many difficulties because of the complexities of fabrication process these require.
It is, therefore, an objection of this invention to provide a sense amplifier that can store a charge of voltage on the storage capacitor of a DRAM memory cell high enough to alleviate .alpha.-particle soft error in the DRAM.